1. Field of the Invention
The present invention relates generally to frequency synthesizers, and more particularly, to comparing frequencies for fast coarse frequency adjustment and to subsequently comparing phases for fine frequency adjustment.
2. Description of the Related Art
For mobile communications, a frequency synthesizer is commonly used in a transceiver to generate a signal with a desired frequency. The frequency synthesizer includes a voltage-controlled oscillator (VCO) with a phase-locked loop (PLL) for feedback control of the VCO that generates the signal with the desired frequency.
FIG. 1 shows a block diagram of a conventional frequency synthesizer 100 including a reference frequency generator 110, a VCO 160, a first frequency divider 170, a second frequency divider 120, a phase/frequency detector 130, a charge pump 140, and a loop filter 150.
The reference frequency generator 110 generates a reference signal with a stable reference frequency (FR) regardless of variation in temperature. Such a reference frequency generator 110 is implemented with a temperature-compensated crystal oscillator (TCXO) for example.
The VCO 160 generates an output signal with an output frequency (FO) that is determined by a control voltage generated by the loop filter 150. In general, the output frequency (FO) is proportional to such a control voltage.
The phase/frequency detector 130 detects a phase (and/or a frequency) difference between the reference signal from the generator 110 and the output signal from the VCO 160. In general, the phase/frequency detector 130 detects a phase (and/or a frequency) difference between a divided reference signal from the second frequency divider 120 having a frequency F2 that is the reference frequency FR divided by a dividing factor M and a divided output signal from the first frequency divider 170 having a frequency F1 that is the output frequency FO divided by a dividing factor N. When a channel of the transceiver is changed, the second number N that is the dividing factor of the first frequency divider 170 is also changed for varying the frequency FO of the output signal from the VCO 160.
The phase/frequency detector 130 generates an up signal or a down signal based on the phase/frequency difference. The up or down signal is provided to the charge pump 140 that provides the loop filter 150 with a charge corresponding to the up or down signal. The loop filter 150 outputs the control voltage based on the charge provided from the charge pump 140. The control voltage from the loop filter 150 has a DC level from low-pass filtering an output signal of the charge pump 140. The control voltage from the loop filter 150 is provided to the VCO 160.
In the conventional frequency synthesizer 100, a charge supply speed of the charge pump 140 is increased for accommodating a wide frequency band for the transceiver. That is, the charge pump 140 operates with a relatively high level of current for accommodating the wide frequency band.
However with such a high current level in the charge pump 140, a frequency lock time may be increased due to a ringing phenomenon. To prevent the ringing phenomenon, the conventional frequency synthesizer 100 includes a dummy resistor. In any case, a size of the charge pump 140 is undesirably increased with the high current level.
Alternatively, U.S. Pat. No. 6,597,249 to Chien et al. discloses a digital coarse frequency tuning block for fast coarse frequency tuning. However, such a digital tuning block generates a digital code such that a digitally controlled VCO is required. Such a digitally controlled VCO may undesirably require additional capacitor elements with increased area of the VCO.
Therefore, a frequency synthesizer capable of achieving a fast frequency lock time without increasing the size of the components of the frequency synthesizer is desired.